In testing an IC device by a semiconductor test system having a test head, an electorial connection needs to be established between the lead pins of the IC device to be tested and the test head. The test head is a part of the semiconductor test system and has a plurality of test channels each of which provides test signal to the corresponding lead pin of the IC device under test and compares the resulting output of the IC device with the expected signal produced by the test system to determine whether the IC device functions correctly or not.
In general, the connection between the IC device and the test head is made through electrically connecting an IC socket which receives the IC device to be tested and a performance board which is attached to the test head. For such a connection method, either a cable-end method or a direct-docking method is used. In the cable-end method, wires are used to connect between the IC socket and the performance board while the direct-docking method, connect boards are used to connect between the IC socket and the performance board.
In the semiconductor industry, the higher functionality and speed of the IC devices and the requirements of minimizing an overall size of the test system while increasing the test efficiency are strongly demanded. Under the circumstances, the above mentioned direct docking-method is thought to be the more advantageous method than the cable-end method.
The reason that the direct-docking method is advantageous is that the test signal paths route can be minimized, thereby signal degradation involving an ultra-high frequency testing can be avoided. Also, this method can easily cope with the change in the kinds of IC devices to be tested. The connection structure accomplished by the direct-docking method is called an IC device interface unit, which is the subject matter of the present invention.
FIG. 4 shows the structure of an IC device interface unit of the conventional technology. FIGS. 4A and 4B respectively show the structures of two IC device interface units aligned adjacent with each other for the convenience of explanation. It should be noted that in the actual semiconductor test system, a large number of such IC device interface units, for example 32 units, are aligned to test 32 IC devices at the same time. FIG. 4A is a plan view and FIG. 4B is a cross sectional view of the IC device interface units. FIG. 4C is an exploded view showing all the components which comprise the interface unit.
In FIG. 4, IC sockets 1 are mounted on corresponding socket boards 26. The IC sockets 1 receive IC devices to be tested which are aligned on a test tray (not shown) when the test tray descends to the IC device interface units. The IC sockets 1 are standard sockets available in the market so that they can receive the IC devices which also seized in accordance with the industry standard. In this example, the width of the IC socket is 24 mm. A handling pitch 14 between the interface units is 50 mm.
The IC socket has a plurality of contact leads (not shown) underneath and each of the contact leads is received by a pin connector 21 mounted on a corresponding conductive land (printed electrode) on the socket board 26. The conductive lands are designated by numeral 13 each of which usually has a through hole for attachment of the pin connector 21. The pin connector 21 has an elastic structure to assure an electric contact between the contact lead of the IC socket 1 and the socket board 26 when the IC socket 1 is mounted on the board 26.
A pair of connect boards 27 are provided under the socket board 26. Typically, the connect board 27 is a printed circuit board having connect pins at both ends as shown in FIG. 4. The connect pins of the connect board 27 are inserted in the corresponding through holes provided on conductive lands 12 of the socket board 26. The conductive lands 13 and 12 are electrically connected in the socket board 26. Thus, the electric connection between the IC socket 1 and the connect boards 27 is established when the board 27 are mounted on the board 26.
The other ends of the connect board 27 are mounted on a performance board 9 which is placed on the test head (not shown) of the semiconductor test system. The connect pins on the connect board 27 are inserted in through holes of the performance board 9. Thus, the electric connection between the IC device to be tested which will be inserted in the IC socket 1 and the performance board 9 will be established when the test tray is placed over the IC device interface units to initiate the IC device testing.
A board space 28 mechanically connects the performance board 9 and socket board 26 through a support frame 17. The support frame 17 also provides an electrical common ground for the IC device interface units. The board spacer 28 also functions to prevent a dry air escaping therefrom. The dry air is provided in the board space 28 to keep the atmosphere of the IC devices in low humidity when the IC device under test is evaluated under the low and high temperature environment formed by an automatic test handler (not shown) which transfers the IC devices on the test tray to the IC device interface units.
In the foregoing conventional structure, however, because of the strong demand for increasing productivity, the number of IC devices to be handled at same time is not sufficient to meet the recent development in the automatic handler and associated test trays. For example, the above conventional structure can handle 32 IC devices in parallel at the same time. However, it is requested that larger number of IC devices, for example, 64 IC devices be tested at the same time. The test trays which can align 64 IC devices have already been used in the semiconductor test system. In the conventional IC device interface units, 64 IC devices aligned in the test tray are tested by a first step in which 32 IC devices are evaluated and a second step in which remaining 32 IC devices are evaluated by shifting the test tray by the handling space 14 of FIG. 4A.
Therefore, there is a need of IC device interface units which can increase the number of IC devices handled at the same time while using the standard size IC sockets. For example, since 64 IC devices are stored in the typical test tray used in the modern semiconductor test system as noted above, there is a special need of establishing a structure of IC device interface units which can handle 64 IC devices at the same time.